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Audio codecs and their perceptual quality evaluation
Hudec, Andrej ; Schimmel, Jiří (referee) ; Rajmic, Pavel (advisor)
The bachelor thesis deals with audio codecs and tests to evaluate their listening quality. The thesis offers a description of the properties of human hearing, a brief introduction to the issues of audio coding, types of audio data compression and listening tests. The bachelor thesis also contains a theoretical description of the coding processes of selected audio codecs, evaluation of measuring their computational complexity and evaluation of listening quality of each of them using listening tests. HTML, CSS, Javascript and Python programming languages were used to implement the listening test environment. The audio files examined in the listening tests were obtained using the FFmpeg library.
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Turbo-convolution and turbo-block codes
Šedý, Jakub ; Krajsa, Ondřej (referee) ; Šilhavý, Pavel (advisor)
The aim is to explain the Turbo convolutional and block turbo codes and decoding the secure message. The practical part focuses on the design of a demonstration program in Matlab. The work is divided into four parts. The first two deal with theoretical analysis of coding and decoding. The third section contains a description created a demonstration program that allows you to navigate the process of encoding and decoding. The fourth is devoted to simulation and performance of turbo codes.
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Adding New Words in a Dynamic Speech Recognition Decoder
Škrdlík, Kryštof ; Veselý, Karel (referee) ; Schwarz, Petr (advisor)
The result of this thesis is a modified speech recognizer developed by the company Phonexia, in which new words that are not part of its dictionary can be added dynamically. The chosen method that was implemented works by inserting finite automata with new words directly into a modified static recognition network describing combined language and pronunciation model of the recognizer in places that are specified in advance. This method offers comparable results with a speech recognizer without modification.
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Data transmition security with Reed-Müller codes
Hrouza, Ondřej ; Burda, Karel (referee) ; Němec, Karel (advisor)
The aim of this work is to propose a Reed-Muller code that secure data transfer to t = 4 independent errors, the information rate R ? 0,5 and for this code to produce a detailed proposal for implementation of the codec. In order to implement this proposal, it is necessary to familiarize themselves with the basic properties Reed-Muller codes. To understand the function of codec Reed-Muller code is in this thesis analyzed the process of encoding and decoding, which is based on a method of using the majority logic. For the design of codec, which consists of encoder and decoder, are used programmable logic circuits FPGA. These circuits are programmed in VHDL language, when for the design source codes is used Xilinx ISE 10.1. In thesis is examined in detail the structure and function of the encoder and decoder chosen Reed-Muller code and there are presented parts of the proposed source codes. Verify the functional ability of the codec is achieved by simulation in program ModelSim SE 5.7f. The simulation results together with the another proposal realization are output of this work.
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Programme for channel coding demonstration
Závorka, Radek ; Vařacha, František (referee) ; Prokeš, Aleš (advisor)
The main subject of this thesis is creating a programme, used for channel coding demonstration. This programme will be used for teaching purposes. The programme contains various codes from simple ones, to those which almost reach Shanon’s channel capacity theorem. Specifically these are the Hamming code, cyclic code, convolutional code and LDPC code. These functions are based on theoretical background described in this thesis and have been programed in Matlab. Practical output of this thesis is user interface, where the user is able to input information word, simulate transmission through the transmission channel and observe coding and decoding for each code. This thesis also contains a comparison between individual codes, concerning bit-error rate depending on SNR and various parameters. There is a computer lab with theoretical background, assignment and sheets for convenient accomplishment of each task.
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Czech-Slovak Statistical Machine Translation
Astaloš, Lukáš ; Kouřil, Jan (referee) ; Smrž, Pavel (advisor)
The aim of this thesis is to design, implement and evaluate the translation system capable of translating texts from Czech to Slovak language. It describes theoretical foundations of statistical machine translation and then the phase of design and development of system. The chosen strategy was to build phrase-based translation model using one large parallel corpus in combination with language model from local institute of linguistics. The statistical machine translation Moses was used to achieve this goal. The vocabulary translation of unknown words using stemming was proposed and tested. Precision of build system was evaluated with BLEU score and it achieved comparable results with other systems.
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Hierarchical Coding of Moving Pictures
Špaček, Milan ; Rášo, Ondřej (referee) ; Schimmel, Jiří (advisor)
Bachelor‘s thesis deals with hierarchical coding – scaling – of moving pictures in currently widely used compression algorithms MPEG-2 and MPEG-4. Scaling is the process whereby the encoded data stream is divided into graduated layers, adapted especially to the possibilities of transmission media and capabilities of terminal devices. The content of the base layer is a signal with reduced quality. The content of one or more extension layers is a supplementary picture information, completing the signal to a full quality form. The decoder, depending on its abilities and external circumstances, can decode only the relevant layers from the received bitstream. The thesis focuses in the theoretical part on the detailed description of encoding and decoding video signal according to MPEG standards using three types of scalability. In the concrete, the spatial, qualitative SNR and Fine granular scalability are mentioned. In the practical part of thesis was created an educational application in Matlab environment with its own graphical user interface, which implements the functions performing spatial, qualitative SNR and Fine granular scalability. Based on the user-specified input parameters, it performs scaling the image and then displays the outputs of individual layers after scaling and after the image reconstruction. The input of the programme, in which a hierarchical coding is done, is the image in bitmap format with any size in RGB format.
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Arduino based serial bus decoder
Giertl, Juraj ; Lattenberg, Ivo (referee) ; Krajsa, Ondřej (advisor)
This project deals with possibilities of capturing and decoding data from different serial buses. Then describe ways of automatic recognition of the buses. The project include hardware and software development of device used for capturing data from different serial buses such as SPI, UART and I2C. Characteristics of these busses are described in detail. Device is design as shield to support Arduino boards. The Shield includes four fully isolated inputs and five non isolated imputs for capturing data, Ethernet interface, SD card and two display interfaces witch supports up to ten displays.
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Burst error correction in digital transmissions using Berlekamp -Preparata codes
Pfudl, Tomáš ; Pfeifer, Václav (referee) ; Němec, Karel (advisor)
Bachelor's thesis discusses properties of the systematic convolution codes for error-bursts correction. Berlekamp-Preparata code is a member of this group. Thesis aims at detail description of this code and for picked code designs a codec. Properties discussed at the first part of thesis are used at the second part for picking the code and designing the codec. For designing there are used various methods (programming scripts, simulation model). Codec design is described from properties of communication channel to hardware realization. Each step is exactly interpreted. Whole theoretical design is made in Matlab and for designing the hardware there is used program Xilinx.
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